1. Field of the Invention
This invention generally relates to detecting defects on a wafer using defect-specific information.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers. One important goal for any wafer inspection system is to suppress nuisance defects. Nuisance defects are those detected events which may not be relevant to semiconductor yields. These nuisance defects may be caused by wafer noise and system noise or are physical objects on the wafer. Nuisance defects may appear anywhere on a wafer. Some defects of interest (DOI) may appear at certain locations on a wafer. Context information for a DOI may be used as prior knowledge for defect detection. Several approaches that use context information have been developed to detect defects. One such approach uses graphical data stream (GDS) data or design information to find hot spots where defects may occur at a higher probability and to inspect defects around the hot spots. Another such approach matches defect background and keeps or removes matched defects after defect detection.
There are, however, a number of disadvantages to such approaches. For example, the first approach works with GDS data. However, GDS information may not be available in all circumstances such as for defect engineers in semiconductor fabrication plants. In addition, the user needs to do patch-to-design alignment (PDA) and run-time swath-based alignment to overlap care areas accurately on the images. If swath-based alignment fails, the locations covered by the swaths will not be inspected. The second approach, which is performed after defect detection, can significantly slow down inspection if the defect count and types of nuisance defects are relatively large. In addition, if the defect signal is relatively weak, huge amounts of nuisance defects may be detected. The defect signal may be defined as the maximum gray-level difference between an image with a defect and a reference image without the defect. The reference image is spatially-aligned with the defect image and may be acquired from neighboring dies or from multiple dies on the wafer. Furthermore, if the methods are performed for keeping systematic DOIs, other nuisance removal mechanisms are needed to separate nuisance defects and randomly-distributed DOIs. None of these approaches use defect-specific information.
Accordingly, it would be advantageous to develop methods and/or systems for detecting defects on wafers that do not have one or more of the disadvantages described above.